0 000  000 000  000 000		halt
0 000  000 000  000 001		wait
0 000  000 000  000 010		rti
0 000  000 000  000 011		bpt
0 000  000 000  000 100		iot
0 000  000 000  000 101		reset
0 000  000 000  000 110		rtt
0 000  000 000  000 111		mfpt
0 000  000 001  ddd ddd		jmp	dddddd
0 000  000 010  000 rrr		rts	rrr
0 000  000 010  011 nnn		spl	nnn
0 000  000 010  100 000		nop
0 000  000 010  100 001		\ condition codes
0 000  000 010  111 111		/  (see below)
0 000  000 011  ddd ddd		swab
0 000  000 1xx  xxx xxx		br	xxxxxxxx
0 000  001 0xx  xxx xxx		bne	xxxxxxxx
0 000  001 1xx  xxx xxx		beq	xxxxxxxx
0 000  010 0xx  xxx xxx		bge	xxxxxxxx
0 000  010 1xx  xxx xxx		blt	xxxxxxxx
0 000  011 0xx  xxx xxx		bgt	xxxxxxxx
0 000  011 1xx  xxx xxx		ble	xxxxxxxx
0 000  100 rrr  ddd ddd		jsr	rrr,dddddd
0 000  101 000  ddd ddd		clr	dddddd
0 000  101 001  ddd ddd		com	dddddd
0 000  101 010  ddd ddd		inc	dddddd
0 000  101 011  ddd ddd		dec	dddddd
0 000  101 100  ddd ddd		neg	dddddd
0 000  101 101  ddd ddd		adc	dddddd
0 000  101 110  ddd ddd		sbc	dddddd
0 000  101 111  ddd ddd		tst	dddddd
0 000  110 000  ddd ddd		ror	dddddd
0 000  110 001  ddd ddd		rol	dddddd
0 000  110 010  ddd ddd		asr	dddddd
0 000  110 011  ddd ddd		asl	dddddd
0 000  110 100  ddd ddd		mark	dddddd
0 000  110 101  ddd ddd		mfpi	dddddd
0 000  110 110  ddd ddd		mtpi	dddddd
0 000  110 111  ddd ddd		sxt	dddddd
0 000  111 000  ddd ddd		csm	dddddd
0 000  111 010  ddd ddd		tstset	dddddd
0 000  111 110  ddd ddd		wrtlck	dddddd
0 001  sss sss  ddd ddd		mov	ssssss,dddddd
0 010  sss sss  ddd ddd		cmp	ssssss,dddddd
0 011  sss sss  ddd ddd		bit	ssssss,dddddd
0 100  sss sss  ddd ddd		bic	ssssss,dddddd
0 101  sss sss  ddd ddd		bis	ssssss,dddddd
0 110  sss sss  ddd ddd		add	ssssss,dddddd
0 111  000 rrr  sss sss		mul	rrr,dddddd
0 111  001 rrr  sss sss		div	rrr,dddddd
0 111  010 rrr  sss sss		ash	rrr,dddddd
0 111  011 rrr  sss sss		ashc	rrr,dddddd
0 111  100 rrr  sss sss		xor	rrr,dddddd
0 111  101 000  000 rrr		fadd	rrr
0 111  101 000  001 rrr		fsub	rrr
0 111  101 000  010 rrr		fmul	rrr
0 111  101 000  011 rrr		fdiv	rrr
0 111  111 rrr  nnn nnn		sob	rrr,nnnnnn
1 000  000 0xx  xxx xxx		bpl	xxxxxxxx
1 000  000 1xx  xxx xxx		bmi	xxxxxxxx
1 000  001 0xx  xxx xxx		bhi	xxxxxxxx
1 000  001 1xx  xxx xxx		blos	xxxxxxxx
1 000  010 0xx  xxx xxx		bvc	xxxxxxxx
1 000  010 1xx  xxx xxx		bvs	xxxxxxxx
1 000  011 0xx  xxx xxx		bcc	xxxxxxxx	(also bhis)
1 000  011 1xx  xxx xxx		bcs	xxxxxxxx	(also blo)
1 000  100 0xx  xxx xxx		emt	xxxxxxxx
1 000  100 1xx  xxx xxx		trap	xxxxxxxx
1 000  101 000  ddd ddd		clrb	dddddd
1 000  101 001  ddd ddd		comb	dddddd
1 000  101 010  ddd ddd		incb	dddddd
1 000  101 011  ddd ddd		decb	dddddd
1 000  101 100  ddd ddd		negb	dddddd
1 000  101 101  ddd ddd		adcb	dddddd
1 000  101 110  ddd ddd		sbcb	dddddd
1 000  101 111  ddd ddd		tstb	dddddd
1 000  110 000  ddd ddd		rorb	dddddd
1 000  110 001  ddd ddd		rolb	dddddd
1 000  110 010  ddd ddd		asrb	dddddd
1 000  110 011  ddd ddd		aslb	dddddd
1 000  110 101  sss sss		mfpd	ssssss
1 000  110 110  ddd ddd		mtpd	dddddd
1 000  110 111  ddd ddd		mfps	dddddd
1 001  sss sss  ddd ddd		movb	ssssss,dddddd
1 010  sss sss  ddd ddd		cmpb	ssssss,dddddd
1 011  sss sss  ddd ddd		bitb	ssssss,dddddd
1 100  sss sss  ddd ddd		bicb	ssssss,dddddd
1 101  sss sss  ddd ddd		bisb	ssssss,dddddd
1 110  sss sss  ddd ddd		sub	ssssss,dddddd
1 111  000 000  000 000		\ floating
1 111  111 111  111 111		/  point
\\\\\\\\\\\\\\\\\\\\\\\
1 111  000 000  000 000		cfcc
1 111  000 000  000 001		setf
1 111  000 000  000 010		seti
1 111  000 000  001 001		setd
1 111  000 000  001 010		setl
1 111  000 001  sss sss		ldfps	ssssss
1 111  000 010  ddd ddd		stfps	dddddd
1 111  000 011  ddd ddd		stst	dddddd
1 111  000 100  ddd ddd		clrf	dddddd		(also clrd)
1 111  000 101  ddd ddd		tstf	dddddd		(also tstd)
1 111  000 110  ddd ddd		absf	dddddd		(also absd)
1 111  000 111  ddd ddd		negf	dddddd		(also negd)
///////////////////////

trap vectors:

	000	reserved
	004	timeout & other errors
	010	illegal/reserved instruction
	014	t-bit trap or bpt instruction
	020	iot instruction
	024	powerfail
	030	emt instruction
	034	trap instruction
	114	memory parity
	240	pirq, program interrupt request
	244	floating point
	250	memory management

condition codes:

	clc	0 000  000 010  100 001		clear c
	clv	0 000  000 010  100 010		clear v
	clz	0 000  000 010  100 100		clear z
	cln	0 000  000 010  101 000		clear n
	ccc	0 000  000 010  101 111		clear all cc bits

	sec	0 000  000 010  110 001		set c
	sev	0 000  000 010  110 010		set v
	sez	0 000  000 010  110 100		set z
	sen	0 000  000 010  111 000		set n
	scc	0 000  000 010  111 111		set all cc bits

processor register addresses

	switches and display	777 570
	r0			777 700
	r1			777 701
	r2			777 702
	r3			777 703
	r4			777 704
	r5			777 705
	r6			777 706 (r6=sp)
	r7			777 707 (r7=pc)
	program intr req	777 772
	stack limit		777 774
	psw			777 776

	keyboard status		777 560
	keyboard data		777 562
	printer status		777 564
	printer data		777 566

psw bits

	ccpprxxxiiitnzvc

	cc = current mode (00=kernel, 01=supervisor, 11=user)
	pp = previous mode (as cc)
	r = general register set
	xxx = mbz?
	iii = processor priority
	t = trace trap
	nzvc = condition codes

addressing modes

	sss sss (or) ddd ddd  =  mmm rrr

	mmm = mode; rrr = register

	000	Rn
	001	(Rn)
	010	(Rn)+	#n
	011	@(Rn)+	@#n
	100	-(Rn)
	101	@-(Rn)
	110	X(Rn)	n
	111	@X(Rn)	@n

single-operand

						n z v c

	clr(b)	b 000  101 000  ddd ddd		0 1 0 0
	com(b)	b 000  101 001  ddd ddd		* * 0 1
	inc(b)	b 000  101 010  ddd ddd		* * * -
	dec(b)	b 000  101 011  ddd ddd		* * * -
	neg(b)	b 000  101 100  ddd ddd		* * * *
	tst(b)	b 000  101 111  ddd ddd		* * 0 0

	ror(b)	b 000  110 000  ddd ddd		* * * *		includes carry bit
	rol(b)	b 000  110 001  ddd ddd		* * * *		includes carry bit
	asr(b)	b 000  110 010  ddd ddd		* * * *
	asl(b)	b 000  110 011  ddd ddd		* * * *
	swab	0 000  000 011  ddd ddd		* * * 0

	adc(b)	b 000  101 101  ddd ddd		* * * *		adds carry bit, not VAX adwc
	sbc(b)	b 000  101 110  ddd ddd		* * * *		subtracts carry bit, not VAX sbwc
	sxt	0 000  110 111  ddd ddd		- * 0 -

double-operand

						n z v c

	mov(b)	b 001  sss sss  ddd ddd		* * 0 -
	cmp(b)	b 010  sss sss  ddd ddd		* * * *
	add	0 110  sss sss  ddd ddd		* * * *
	sub	1 110  sss sss  ddd ddd		* * * *

	bit(b)	b 011  sss sss  ddd ddd		* * 0 -
	bic(b)	b 100  sss sss  ddd ddd		* * 0 -
	bis(b)	b 101  sss sss  ddd ddd		* * 0 -

	mul	0 111  000 rrr  sss sss		* * 0 *
	div	0 111  001 rrr  sss sss		* * * *
	ash	0 111  010 rrr  sss sss		* * * *
	ashc	0 111  011 rrr  sss sss		* * * *
	xor	0 111  100 rrr  ddd ddd		* * * *

branch

	if condition, pc <- updated pc + (2 * xxxxxxxx)

						condition

	br	0 000  000 1xx  xxx xxx		    1
	bne	0 000  001 0xx  xxx xxx		!=	!z
	beq	0 000  001 1xx  xxx xxx		==	z
	bge	0 000  010 0xx  xxx xxx		>=	n^v^1
	blt	0 000  010 1xx  xxx xxx		<	n^v
	bgt	0 000  011 0xx  xxx xxx		>	!(z|(n^v))
	ble	0 000  011 1xx  xxx xxx		<=	z|(n^v)

	bpl	1 000  000 0xx  xxx xxx		+ve	!n
	bmi	1 000  000 1xx  xxx xxx		-ve	n
	bhi	1 000  001 0xx  xxx xxx		>u	!(c|z)
	blos	1 000  001 1xx  xxx xxx		<=u	c|z
	bvc	1 000  010 0xx  xxx xxx			!v
	bvs	1 000  010 1xx  xxx xxx			v
	bcc	1 000  011 0xx  xxx xxx		>=u	!c	(also bhis)
	bcs	1 000  011 1xx  xxx xxx		<u	c	(also blo)

jump, subroutine, loop

	jmp	0 000  000 001  ddd ddd
	jsr	0 000  100 rrr  ddd ddd
	rts	0 000  000 010  000 rrr
	mark	0 000  110 100  nnn nnn
	sob	0 111  111 rrr  nnn nnn

trap & interrupt

	emt	1 000  100 0xx  xxx xxx
	trap	1 000  100 1xx  xxx xxx
	bpt	0 000  000 000  000 011
	iot	0 000  000 000  000 100
	rti	0 000  000 000  000 010
	rtt	0 000  000 000  000 110		inhibit t-bit trap

misc

	halt	0 000  000 000  000 000
	wait	0 000  000 000  000 001		await interrupt
	reset	0 000  000 000  000 101		reset bus
	nop	0 000  000 010  100 000

	spl	0 000  000 010  011 nnn
	mfpi	0 000  110 101  sss sss		move from previous instruction space
	mtpi	0 000  110 110  ddd ddd		move to previous instruction space
	mfpd	1 000  110 101  sss sss		move from previous data space
	mtpd	1 000  110 110  ddd ddd		move to previous data space

tstset	test-and-set; see code
wrtlck	write-locked; see code
mfps	move low byte of psw into destination (as if with movb, eg sign-extend into register)
	N, Z set as normal for movb; V cleared; C not affected
mtps	move low byte of source into low byte of psw
	T bit cannot be set this way
	priority can be set only in kernel mode
csm	call supervisor mode
mfpt	r0 = <proc type>  (eg, 5 for kdj11a)
mtpd/mtpi	pop stack into dst, but stack uses current mode and dst uses previous mode mmap.
mfpd/mfpi	push src onto stack, but stack uses current mode and src uses previous mode mmap.
		if both mode fields are user, mfpi works as if it were mfpd.
