Subject: Re: Help with pdp-11/10

From: [email-masked] (Peter N. Turnbull (1Y0))
Date: 25 Sep 1995 20:20:17 BST

It is indeed possible to disable the on-board SLU on a KD11-B (11/05 CPU). 
I assume (please correct me if I'm wrong) that an 11/10 is similar.

According to my print set, "with W1 *installed* the CPU does not respond to
internal addresses 177560-177566 and another interface device corresponding
to these standard console addresses can be configured with the KD11-B."

W1 is on the M7261 board (control logic and microprogram board) between E69
and C51 (about halfway up the board, roughly in line with edge connector
DH1/DH2).

The DL11-W (M7856) has 5 DIP switch packs, to set address, vector, baud
rate, etc.  Unfortunately, the functions aren't handily grouped (except in
the sense one might use if laying out a PCB :-)

Approximate layout (ASCII art isn't my best point):

       \______/       \______/                     \______/
     _____II_____________II___________________________II_____
    |                                                        |
    |                                                    ___ |
    |                                           Berg    |  / |UU,VV
    |                                         connector |  | |
    |                                                   |  | |
    |                                                   |  | |
    |                                                   |  | |
    |                                      S3: 1..10    |__\ | B,A
    |                                                        |
    |                                                        |
    |                                                        |
    |                                             S1: 1..10  |
    |                                                        |
    |            S5: 1..10                                   |
    |                                S4: 1..10               |
    |                                                        |
    |                                                        |
    |                                                        |
    |                                                        |
    |                                         S2: 1..8       |
    |            ___            __            ___            |
     |          |   |          |  |          |   |          |
     |__________|   |__________|  |__________|   |__________|

The DL11-W has a Line-Time Clock and one SLU, which can be used in EIA
(RS232) mode or 20mA current-loop.

There are three address modes:

    1)  Both SLU and LTC active.  Only possible if SLU address is set
        to 77756x.  LTC address is 777546.

    2)  Only the SLU is addressable, in the range 774000-777776.
        LTC disabled.

    3)  Only the LTC is addressable, the SLU is disabled.

Standard address settings:

    addr.bit: A10    A9    A8    A7    A6    A5    A4    A3   LTC   LTC
    switch:   S5-3  S5-2  S5-1  S5-4  S5-5  S5-6  S5-8  S5-7 S5-9  S5-10
    Mode 1:   off   off   off    ON   off   off   off    ON  off    ON
    Mode 2:   off   off   off    ON   off   off   off    ON   ON    ON
    Mode 3:   off   off   off    ON   off   off    ON    ON   ON    ON

    I've shown the mode2 setting for standard console address.  It can be
    changed, ON=0 and OFF=1 for the appropriate address bits.

Standard vector settings:

    The LTC vector is fixed at 100.  For console use, the SLU vector
    should be set to 60, otherwise use the normal vector allocation.
    For S2, ON=1 and OFF=0 (opposite way to S5).  S2-1, S2-2 do nothing.
    
    Vector bit:   V8    V7    V6    V5    V4    V3
    switch:      S2-8  S2-7  S2-5  S2-3  S2-6  S2-4
    for console:  off   off   off   ON    ON    off

The SLU provides 20mA and EIA signals on different pins of the Berg
connector.  Standard BC05C, 7008360, or 7008519 cables can be used (see
below).  The 20mA current loop provides RDR ENBL, and can be active or
passive, independantly set for transmitter and receiver:

    Transmitter:   S1-1   S1-2   S1-3   S1-6   S1-7
    Active:         ON     ON     off    off    ON
    Passive:        off    off    ON     ON     off

    Receiver:      S3-6   S3-7   S3-8   S3-9   S3-10
    Active:         ON     off    ON     off    ON
    Passive:        off    ON     off    ON     off

    Reader Enable: S1-4   S1-5   S1-8   S1-9   S1-10
    Active:         ON     off    ON     off    ON
    Passive:        off    ON     off    ON     off

Baud rates:       _____Transmit_____      ______Receive_____
                  S4-10  S3-1   S3-4      S3-2   S3-3   S3-5
     110            ON    ON     ON        off    off    off
     150            off   ON     ON        ON     off    off
     300            ON    off    off       off    ON     ON
     600            ON    off    ON        off    ON     off
    1200            ON    ON     off       off    off    ON
    2400            off   off    off       ON     ON     ON
    4800            off   off    ON        ON     ON     off
    9600            off   ON     off       ON     off    ON

The remaining switch settings are for data format:

    (No)Parity:   S4-6  When on, enable parity.
    Odd/Even:     S4-2  When on, and S4-6 is on, use ODD parity
                        When off, and S4-6 is on, use EVEN parity
                        If S4-6 is off, this switch has no effect
    STOP bits:    S4-5  ON = 1 stop bit
                        OFF = 2 stop bits (6,7, or 8-bit data)
                        OFF = 1.5 stop bits (5-bit data)
    Data word length:   5 bits  6 bits  7 bits  8 bits
                  S4-3   ON      off     ON      off
                  S4-4   ON      ON      off     off

Cable pinouts (blank means "no connection"):
Numbers are DB25 pin numbers (for the BC05C) or Mate-N-Lok pin
numbers (for 7008360):

Berg pin Signal              BC05C                       7008360

   A     Ground            1 Prot.Ground (blue/wht)    - ground
   B     Ground            7 Signal Ground (brwn/wht)
   C                      25 Force Busy (red/org)
   D                      13 Secondary CTS (org/red)
   E     TTL serial in     - interlock in              - interlock in
   F     EIA serial out    2 Transmit Data (wht/blue)
   H     20mA interlock                                - interlock out
   J     EIA serial in     3 Receive Data (org/wht)
   K     +20mA serial in                               7 + Rec.Data (green)
   L                      24 External clk (brwn/red)
   M     EIA interlock     - interlock out
   N                      15 serial clk xmit (grey/grn)
   P                      19 Secondary RTS (lbue/blk)
   R                      17 serial clk recv (grey)
   S     -20mA serial in                               3 - Rec.Data (red)
   T                       5 Clear To Send (grn/wht)
   U
   V     EIA RTS           4 Request To Send (wht/org)
   W                      10 -ve power (wht/grey)
   X                      22 Ring (blk/org)
   Y                       9 +ve power (grey/wht)
   Z                       6 Data Set Ready (wht/grn)
  AA     +20mA serial out                              5 + Trans.Data (white)
  BB                       8 Data Carrier Detect (wht/brwn)
  CC     
  DD     EIA DTR          20 Data Terminal Ready (blk/blu)
  EE     -20mA RDR Run                                 3 - Reader Run (black)
  FF                      11 202 Secondary TD (blu/red)
  HH
  JJ                      12 202 Secondary RD (red/blu)
  KK     -20mA serial out                              2 - Trans.Data (black)
  LL                      14 EIA Secondary TD (grey/red)
  MM                      21 Signal Quality (org/blk)
  NN                      16 EIA Secondary RD (red/brwn)
  PP     +20mA RDR Run                                 6 + Reader Run (black)
  RR                      23 Signal Rate (grn/blk)
  SS
  TT     +5V DC
  UU     ground
  VV     ground

Good luck!

Pete