The IBM System/3 simulator is configured as follows:

   CPU   5410 (Model 10) CPU with 64KB of memory.
   PKB   5471 Printer/Keyboard console.
   PCH   MFCU Primairy Card Hopper.
   SCH   MFCU Secondairy Card Hopper.
   STKn  MFCU Card stacker (n=1, 2, 3 & 4).
   CDR   1442 Card Reader
   CDP   1442 Card Punch
   CDP2  1442 2nd stacker
   LPT   1403 Line Printer
   R1    5444 Drive
   F1    5444 Drive
   R2    5444 Drive
   F2    5444 Drive
   T0    3411 Tape unit
   T1    3410 Tape unit
   T2    3410 Tape unit
   T3    3410 Tape unit

    The only CPU options are to set Model 15 mode (not implemented), DPF
(Dual Programming Facility, not implemented), and the memory size 8K, 16K,
32K, 48K, or 64K.

CPU registers are the standard System/3 set:

   name    size  Description

   IAR      16   Instruction Address Register for Program Level 1
   ARR      16   Address Recall Register for Program Level 1
   IAR-P2   16   IAR for Program Level 2 (not implemented)
   ARR-P2   16   ARR for Program Level 2 (not implemented)
   AAR      16   A-Address Register
   BAR      16   B-Address Register
   PSR      16   Program Status Register
   XR1      16   Index Register 1
   XR2      16   Index Register 2
   IAR<0:7> 16   IAR for interrupt level 0 thru 7
   ARR<0:7> 16   ARR for interrupt level 0 thru 7

Plus these simulator registers:

   LEVEL     8   Current operating level (8=P1, 9=P2,
                 0 thru 7 = Interrupt level)
   SR       16   Front Panel switches
   INT      16   Interrupt Request Flags
   WRU       8   Simulator Interrupt Character
   BREAK    16   Breakpoint Address

.1   - 5471 Printer/Keyboard

This is the operator console. It has the following registers:

   FLAG   5471 Flag Bytes
   IBUF:  Input character from keyboard
   OBUF:  Output character to printer
   POS:   Number of characters printed
   TIME:  Delay for device operation

.2   - 1442 Card Reader. 

This reader reqads 80-column cards; the input
is usually an ASCII file which is translated to EBCDIC when read,
but optionally can be a binary file in EBCDIC format (such as an
object program).

   LAST   Last card switch
   ERR    Card Reader Error
   NOTRDY 1442 reader not ready (not attached or past EOF)
   DAR    Data Address Register (shared with punch)
   LCR    Length Count Register (shared with punch)
   EBCDIC EBCDIC mode flag: if 1, input is 80-col EBCDIC binary.
          (IPL from 1442 automatically sets this to 1).
   S2     Stacker 2 is selected when this is 1
   POS    Number of cards read
   TIME   Device Delay

.3   - 1442 Card Punch. 

Normally cards are written to the attached
disk file as Ascii with newline/cr delimiters. But an optional
flag allows writing as 80-coluymn binary EBCDIC.

   ERR    Card Punch Error
   EBCDIC When thsi is 1, output will be 80-col EBCDIC.
   S2     When this is 1, output is placed in stacker 2
   NOTRDY 1442 punch not ready (not attached)
   DAR    Data Address Register (shared with reader)
   LCR    Length Count Register (shared with reader)
   POS    Number of cards punched
   TIME   Device Delay

.4 - 1442 Stacker 2.  
When cards are to be punched in stacker 2,
attach as disk file to this device to hold that output.

   POS0   Number of cards punched.

.5   - 1403 Printer. 
This is a 132-column output device, emulating the famous 
IBM 1403, models 2, 6, and N1. Output is always 
translated to ASCII with newline/CR delimiters. Page advance
is output as a form feed.

   ERR    1403 error flag
   LPDAR  Data Address Register
   LPFLR  Forms Length Register
   LPIAR  Image Address Register
   LINECT Current Line on form
   POS    Number of lines printed

.6 - 5444 Disk Drives (R1, R2, F1, F2)

The 5444 came as a set of two drives, each with two disks. The
top disk in a drive was removeable, the bottom fixed. The first
drive consists of disks R1 and F1, the second drive R2 and F2.
Each disk holds 2,567,600 bytes of data.

   NOTRDY Drive not ready (not attached)
   SEEK   Drive is busy with a seek operation
   DAR    Data Address Register
   CAR    Control Address Register
   ERR    Error Flags (16 bits)
   CYL    Current Cylinder (0 thru 203)
   HEAD   Current head (0 or 1)
   POS    Current position in attached disk file
   TIME   Device Delay

.7 - Symbolic Display and Input

The System/3 Simulator supports symbolic display and input.
Display is controlled by command line switches:

   (none)   display as hex EBCDIC
   -c   display bytes as characters
   -m   display instruction mnemonics.

The assembler format contains the same elements as the machine
language operation, but not always in the same format. The
operation code frequently specifies both the opcode and the Q byte,
and the top nybble of the opcode is determined by the format of the
addresses.

Addresses take two forms: the direct address in hex, or a relative
address specified thusly: (byte,XRx) where 'byte' is a 1-byte
offset, and XRx is either XR1 or XR2 for the two index registers.
Use these formats when 'address' is indicated below:

When 'reg' is mentioned, a mnemonic may be used for the register,
thusly:

   IAR    Instruction Address Register for the current program level
   ARR    Address Recall Register for the current program level
   P1IAR  IAR for Program Level 1
   P2IAR  IAR for Program Level 2
   PSR    Program Status Register
   XR1    Index Register 1
   XR2    Index Register 2
   IARx   IAR for the interrupt level x (x = 0 thru 7)

All other operands mentioned below are single-byte hex, except for
the length (len) operand of the two-address instructions, which is a
decimal length in the range 1-256.

   No-address formats:
   ------------------

   HPL hex,hex       Halt Program Level, the operands are the
                     Q and R bytes.


   One-address formats:
   -------------------

   A reg,address     Add to register
   CLI address,byte  Compare Logical Immediate
   MVI address,byte  Move Immediate
   TBF address,mask  Test Bits Off
   TBN address,mask  Test Bits On
   SBF address,mask  Set Bits Off
   SBN address,mask  Set Bits On
   ST reg,address    Store Register
   L reg,address     Load Register
   LA reg,address    Load Address
   JC address,cond   Jump on Condition
   BC address,cond   Branch on Condition

These operations do not specify a qbyte, it is implicit in the
opcode:

      B address      Unconditional branch to address
      BE address     Branch Equal
      BNE address    Branch Not Equal
      BH address     Branch High
      BNH address    Branch Not High
      BL address     Branch Low
      BNL address    Branch Not Low
      BT address     Branch True
      BF address     Branch False
      BP address     Branch Plus
      BM address     Branch Minus
      BNP address    Branch Not Plus
      BNM address    Branch Not Minus
      BZ address     Branch Zero
      BNZ address    Branch Not Zero
      BOZ address    Branch Overflow Zoned
      BOL address    Branch Overflow Logical
      BNOZ address   Branch No Overflow Zoned
      BNOL address   Branch No Overflow Logical
      NOPB address   No - never jump

      (substitute J for B above for a set of Jumps -- 
       1-byte operand (not 2), always jumps forward up to 255 bytes. 
      In this case, 'address' cannot be less than the current 
      address, nor greater than the current address + 255)

      Two-address formats (first address is destination, len is decimal 1-256):
      -------------------

      MVC address,address,len  Move Characters
      CLC address,address,len  Compare Logical Characters
      ALC address,address,len  Add Logical Characters
      SLC address,address,len  Subtract Logical Characters
      ED address,address,len   Edit
      ITC address,address,len  Insert and Test Characters
      AZ address,address,len   Add Zoned Decimal
      SZ address,address,len   Subtract Zoned Decimal

      MNN address,address      Move Numeric to Numeric
      MNZ address,address      Move Numeric to Zone
      MZZ address,address      Move Zone to Zone
      MZN address,address      Move Zone to Numeric

      I/O Format
      ----------

      In the I/O format, there are always 3 fields:

      da - Device Address 0-15 (decimal)
      m - Modifier 0-1
      n - Function 0-7

      The meaning of these is entirely defined by the device addressed.

      There may be an optional control byte, or an optional address (based
      on the type of instruction).
 
      SNS da,m,n,address       Sense I/O
      LIO da,m,n,address       Load I/O
      TIO da,m,n,address       Test I/O

      SIO da,m,n,cc            Start I/O -- cc is a control byte

      APL da,m,n               Advance Program Level


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